2.3 Memory cycles
The actual memory cycle of a memory chip depends on the processor and MMU architecture. This section describes memory
cycles of the most simplistic case.
2.3.1 Memory write
If an instruction is to update the content of a memory location, then the following happens:
-
1.
- the MMU computes the chip number and address on chip
-
2.
- the address is “latched” to the address lines, this means the MMU is driving the lines, and the lines stay driven
-
3.
- the read/write line is low to specify a write operation
-
4.
- the new content of the location is latched to the data lines
-
5.
- the chip select line is asserted to select one memory chip
-
6.
- the selected memory chip samples the address lines to determine which location to connect the data lines to
(cannot observer)
-
7.
- the selected memory chip connects the data lines to the location specified (cannot observe)
-
8.
- the selected location is overwritten by the content specified on the data lines (cannot observe)
-
9.
- the MMU waits for a fixed amount of time, then releases the chip select line
-
10.
- the MMU stops driving the data lines
-
11.
- the address lines are not driven by the MMU anymore
-
12.
- memory cycle completed
2.3.2 Memory read
If an instruction is to read the content of a memory location, then the following happens:
-
1.
- the MMU computes the chip number and address on chip
-
2.
- the address is “latched” to the address lines
-
3.
- the data lines are left “floating” (not driven by the MMU)
-
4.
- the read/write line is high to specify a read operation
-
5.
- the chip select line is asserted to select one memory chip
-
6.
- the selected memory chip samples the address lines to determine which location to connect (cannot observe)
-
7.
- the selected location of the selected memory chip connects to the data lines, driving the data lines based on
the memory content
-
8.
- the MMU waits for a certain amount of time, then samples the data lines to read the content
-
9.
- the MMU releases the chip select line
-
10.
- the select memory chip stops driving the data lines
-
11.
- the address lines are not driven by the MMU anymore
-
12.
- memory cycle completed