Without going into hardware details, the main memory of a computer is usually implemented by multiple memory chips. Each memory chip has a certain storage capacity, usually measured in bytes.
The external interface of a memory chip consists of the following:
The pins corresponding to the address are input pins. Each pin accepts a binary input (high means 1, low means 0). Together, the address pins specify an address on the chip. For example, if a memory chip has A0 to A9 as address pins, then it can specify location 0 (0b0000000000) to 511 (0b1111111111).
Each location of a memory chip is an individual quantum to access. This means that there is no way to access any quanta smaller than a location. For our example, let us assume each location is a byte (8 bits) wide.
The data pins of a memory chip must be wide enough to input or output the content of a location. This means that if a location is a byte, then we can expect 8 data pins, D0 to D7. Data pins are bi-directional, depending on whether we can to read the content of a location (data pins become output) or write to the content of a location (data pins become input).
A single pin called the “read/write” pin specifies whether a pending operation is a read operation or a write options. If it is written as R/W, then a high signal means read, a low signal means write.
The “chip select” line of a memory chip is an enable pin. This pin is asserted if a memory chip is to perform a memory operation. This means that we can specify the address pins and read/write pins all we want, but if the chip select pin is not asserted, then a memory chip simply ignores all the other pins.