Up to this point, everything is theoretical. When we implement a multi-bit adder, we have to make design choices. If ci is explicitly represented, then we minimize the amount of circuits. However, this also means that until ci−1 is computed, si and ci cannot be stable. Consequently, if ci is explicitly represented, then c0 must be computed first, along with r0. Once c0 is computed, then we can stablize r1 and c1, then r2 and c2 and etc.
This effect is called carry rippling. With many bits in a word, it can take a significant amount of time to ripple the carry through the adders.