A half adder is not sufficient to be the adder of a bit. Let xi represent the value of bit i of a number x, yi represent the value of bit i of a number y. Let s = x + y, and si represents the value of bit i of the sum.
The carry bit from the addition of bit position i is represented as ci. This is an intermediate term that helps the explanation of a full adder.
Using the result and carry functions, ∀i ∈ [1…n − 1] : si = R(R(xi,yi),ci−1) in which n is the number of bits. s0 = R(x0,y0) because there is no previous digit. At the same time, we can also express ci using the function ‘C’: ∀i ∈ [1…n − 1] : ci = C(xi,yi) + C(R(xi,yi),ci−1). c0 = C(x0,y0) because there is no carry from a previous digit.
Note how we use two ‘R’ and two ‘C’ to compute the bit of a sum and its corresponding carry. This means we need two half adder circuits to do this.