Much like most tools in Linux, a Makefile accepts variables. Observe the following enhanced version of our example Makefile:
Here, we define a variable CFLAGS that expands to “-O -Wall -o -g”. This is quite handy, because now we can refer to CFLAGS everywhere we invoke gcc. If we decide to let the compiler perform crazy optimization, we only have to change the definition of CFLAGS to use -O3 instead of -O.
Cool, eh? Wait till you see what else we can do with variables!