4 Variables in a Makefile

Much like most tools in Linux, a Makefile accepts variables. Observe the following enhanced version of our example Makefile:

CXXFLAGS = -O -Wall -g
  
main:  main.o array.o
	gcc $(CXXFLAGS) -o main main.o array.o

array.o:  array.c array.h
	gcc $(CXXFLAGS) -c array.c

main.o:  main.c array.h
	gcc $(CXXFLAGS) -c main.c

Here, we define a variable CXXFLAGS that expands to ``-O -Wall -o -g''. This is quite handy, because now we can refer to CXXFLAGS everywhere we invoke gcc. If we decide to let the compiler perform crazy optimization, we only have to change the definition of CXXFLAGS to use -O3 instead of -O.

Cool, eh? Wait till you see what else we can do with variables!